rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a microprocessor supervisory circuits ADM8698/adm8699 functional block diagram reset generator 4.65v v cc watchdog input wdi * ADM8698/ adm8699 reset watchdog output wdo * reset * * wdi (adm8699 only) reset (soic only) wdo (adm8699 soic only) watchdog transition detector (1 sec) typical application circuit * adm8699 only +5v v cc wdi * gnd ADM8698/ adm8699 reset m p power m p system i/o line m p reset features superior up grade for adm698/adm699, max698/max699 guaranteed reset assertion with v cc = 1 v low 70 m a supply current precision 4.65 v voltage monitor power ok/reset time delay watchdog timer minimum component count performance specified over temperature applications microprocessor systems computers controllers intelligent instruments automotive systems critical m p power monitoring general description the ADM8698/adm8699 supervisory circuits provide power supply monitoring and watchdog timing for microprocessor systems. the ADM8698 monitors the 5 v v cc power supply and gener- ates a reset pulse during power up, power down and during low voltage brown out conditions. the reset output is guaranteed to be functional (logic low) with v cc as low as 1 v. the adm8699 features an identical monitoring circuit as in the ADM8698, plus an additional watchdog timer input to monitor microprocessor activity. the reset output is forced low if the watchdog input is not toggled within the 1 second watchdog timeout period. both parts are available in 8-pin plastic dip/soic and 16-lead soic p ackages. the 16-lead soic contains additional out- puts reset (without inversion) and watchdog output wdo (adm8699 only). one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 world wide web site: http://www.analog.com fax: 617/326-8703 ? analog devices, inc., 1997
rev. 0 C2C ordering guide temperature package model range options* ADM8698an C40 c to +85 c n-8 ADM8698arw C40 c to +85 c r-16 ADM8698arn C40 c to +85 c r-8 adm8699an C40 c to +85 c n-8 adm8699arw C40 c to +85 c r-16 adm8699arn C40 c to +85 c r-8 *n = plastic dip; r = small outline. absolute maximum ratings* (t a = +25 c unless otherwise noted) v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to +6 v all other inputs . . . . . . . . . . . . . . . . . . . C0.3 v to v cc + 0.3 v power dissipation 8-pin dip . . . . . . . . . . . . . . . . . . . . 500 mw q ja , thermal impedance . . . . . . . . . . . . . . . . . . . . +120 c/w power dissipation 16-pin soic . . . . . . . . . . . . . . . . . 375 mw q ja , thermal impedance . . . . . . . . . . . . . . . . . . . . +110 c/w power dissipation 8-pin soic . . . . . . . . . . . . . . . . . . 500 mw q ja , thermal impedance . . . . . . . . . . . . . . . . . . . . +125 c/w operating temperature range industrial (a version) . . . . . . . . . . . . . . . . . C40 c to +85 c storage temperature range . . . . . . . . . . . . . C65 c to +150 c lead temperature (soldering, 10 secs) . . . . . . . . . . . . +300 c vapor phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . . +215 c infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220 c esd rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >4 kv *stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum ratings for extended periods of time may affect device reliability. (v cc = +5 v 6 10%, t a = t min to t max unless otherwise noted) ADM8698/adm8699Cspecifications parameter min typ max units test conditions/comments v cc operating voltage range 3.0 5.5 v supply current 70 100 m a power-down reset assertion 4.5 4.65 4.75 v power-up reset deassertion reset threshold hysteresis 40 mv reset active time 140 200 280 ms watchdog timeout period (adm8699) 1.0 1.6 2.25 s minimum wdi input pulse width 50 ns v il = 0.4, v ih = 0.8 (v cc ) reset output voltage 0.4 v i sink = 3.2 ma, v cc = 4.4 v reset output voltage (v cc = 1 v) 12 200 mv i sink = 100 m a, v cc = 1.0 v 3.5 v i source = 500 m a, v cc = 5 v reset and wdo output voltage 0.4 v i sink = 3.2 ma, v cc = 5 v 3.5 v i source = 1 m a, v cc = 4.4 v reset output short circuit current 45 ma output sink current wdi input threshold (adm8699) logic low 0.8 v logic high 3.5 v wdi input current +1 +10 m a wdi = v cc C10 C1 m a wdi = 0 v specifications subject to change without notice.
ADM8698/adm8699 rev. 0 C3C pin function descriptions mnemonic function v cc +5 v power supply input. gnd 0 v. ground reference for all signals. reset logic output. reset goes low whenever v cc falls below the reset voltage threshold (4.65 v typ). reset remains low for a minimum of 140 ms after v cc returns to 5 v. reset also goes low for a minimum of 140 ms if the watchdog timer is enabled but not serviced within its time- out period. wdi watchdog input. wdi is a three level input. if wdi remains either high or low for longer than the watchdog timeout period, reset pulses low and wdo goes low. the timer resets with each transition on the wdi line. the watchdog timer may be disabled if wdi is left floating or is driven to midsupply. reset (soic packages only) logic output. reset is an active high output. it is the inverse of reset . wdo (soic adm8699 only) logic output. the watchdog output, wdo , goes low if wdi remains either high or low for longer than the watchdog timeout period. wdo is set high by the next transition at wdi. if wdi is unconnected or at midsupply, the watchdog timer is disabled and wdo remains high. pin configurations 8-lead dip & soic 1 2 3 4 8 7 6 5 top view (not to scale) o top view (not to scale) ADM8698/ adm8699 v cc v cc gnd gnd gnd nc (wdi) * nc * ( ) adm8699 only reset nc = no connect 16-lead soic 1 2 3 4 16 15 14 13 top view (not to scale) o 5 12 611 710 89 top view (not to scale) ADM8698/ adm8699 gnd v cc v cc gnd nc nc nc nc reset nc nc nc (wdi) * nc gnd reset nc (wdo) * *( ) adm8699 only nc = no connect typical performance curves 10 90 100 0% 1v a4 500ms 3.36 v 1v figure 1. reset output voltage vs. v cc temperature ? c ?0 90 ?0 ?0 10 30 50 70 230 170 reset delay ?ms 200 220 210 190 180 figure 2. reset timeout delay vs. temperature temperature ? c ?0 ?0 0 30 60 90 120 4.69 4.57 reset voltage threshold ?v 4.63 4.67 4.65 4.61 4.59 4.55 figure 3. reset voltage threshold vs. temperature
ADM8698/adm8699 rev. 0 C4C c2926C10C2/97 printed in u.s.a. circuit information power fail reset a precision voltage detector monitors v cc and generates a r eset output to hold the microprocessors reset line low when v cc falls below the reset threshold 4.65 v (see figure 4). the reset voltage threshold is set to accommodate a 5% variation on v cc . the voltage detector has 40 mv hysteresis to ensure that glitches on v cc do not activate the reset output. on power-up, an internal monostable holds reset low for 140 ms after v cc rises above the reset threshold. this allows the power supply to stabilize on power-up and also prevents repeated toggling of reset even if the 5 v power drops out and recovers with each power line cycle. in order to prevent mistriggering due to transient voltage spikes, it is recommended that a 0.1 m f capacitor be connected at the v cc pin. the reset output is guaranteed to remain low with v cc, as low as 1 v. this holds the microprocessor in a stable shutdown condition as the power supply comes up. on the 16-lead soic package, an active high reset output is also provided. this is the complement of reset and is in- tended for microprocessors requiring an active high signal. v 2 v 2 v 1 v 1 v cc reset v 1 = reset voltage threshold v 2 = reset voltage threshold + threshold hysteresis t 1 = reset time t 1 t 1 figure 4. watchdog timeout period vs. temperature watchdog timer (adm8699 only) the watchdog timer input (wdi) monitors an i/o line from the m p system. the m p must toggle this input once every 1.6 sec- onds to verify correct software execution. failure to toggle the line indicates that the m p system is not correctly executing its program and may be tied up in an endless loop. if this happens, a reset pulse is generated to initialize the processor. the wdi input is a three level input and will recognize a low- to-high or high-to-low transition on its input. the watchdog timer is reset by each wdi transition and then begins its timeout period. if the wdi pin remains either high or low, reset pulses will be issued every 1.6 seconds typically. if the watchdog timer is not needed, the wdi input should be left floating. the watchdog output ( wdo ) (soic package only) provides watchdog status information. it is driven low if wdi is not toggled within the watchdog timeout period. it goes high at the next wdi transition. it is also set high when v cc falls below the reset threshold. t 1 = reset time t 2 = watchdog time out period t 1 t 1 wdi reset t 1 wdo t 2 t 2 figure 5. wat chdog timeout period and reset active time outline dimensions dimensions shown in inches and (mm). 8-pin plastic dip (n-8) 8-pin soic (r-8) 16-lead soic (r-16) pin 1 seating plane 0.430 (10.92) max 14 5 8 0.018 (0.46) 0.033 (0.84) 0.1 (2.54) bsc 0.125 (3.18) min 0.035 (0.89) 0.18 (4.57) 0.25 (6.35) 0.31 (7.87) 0.011 (0.28) 0.18 (4.57) max 0.3 (7.62) 85 4 1 0.1968 (5.00) 0.1890 (4.80) 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20) 0.2284 (5.80) pin 1 seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.102 (2.59) 0.094 (2.39) 0.0500 (1.27) bsc 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 0.019 (0.49) 0.05 (1.27) ref 0.104 (2.65) 0.012 (0.3) 0.413 (10.50) 0.419 (10.65) 0.299 (7.60) 1 8 9 16 0.042 (1.07) 0.013 (0.32) 0.030 (0.75)
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